The present invention relates to a semiconductor memory device and, particularly, to technology for implementing defect remedy schemes for a mask type ROM (Read-Only Memory) of a type utilizing non-volatile memory element of a single layer polysilicon gate structure.
It is a known technology to use an EPROM (Erasable & Programmable Read-Only Memory) in a defect remedy and with respect to the updating of data to be stored in a mask type ROM. The technology for using a single layer polysilicon gate structure in an EPROM is described, for instance, in the Technical Search Report of Japanese Electronics Information and Communication Society, Vol. 90, No. 47, pp. 51 to 53, issued on May 21, 1990.